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ADS8688 八路數(shù)據(jù)采集系統(tǒng)開發(fā)方案 |
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文章來(lái)源: 更新時(shí)間:2014/11/8 9:25:00 |
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TI公司的ADS8688是基于16位逐次逼近(SAR)模數(shù)轉(zhuǎn)換器(ADC)的八路數(shù)據(jù)采集系統(tǒng),工作在500kSPs的吞吐量.雙極工作電源±10.24 V,±5.12 V和±2.56 V,單極工作電源0 V 到 10.24 V和0 V到5.12 V,輸出保護(hù)電壓高達(dá)成±20 V,低功耗65mW,具有極好的性能: SNR: 92 dB;THD:–102 dB.主要用于工業(yè)控制,PLC和數(shù)據(jù)采集系統(tǒng).本文介紹了ADS8688主要特性,框圖,以及在電源自動(dòng)化和PLC的數(shù)據(jù)采集系統(tǒng)框圖, ADS8688EVM-PDK 評(píng)估模塊主要特性和GUI主要特性,電路圖,材料清單和六層PCB設(shè)計(jì)圖.
The ADS8684 and ADS8688 are 4- and 8-channel, integrated data acquisition systems based on a 16-bit successive approximation (SAR) analog-to-digital converter (ADC), operating at a throughput of 500 kSPS. The devices feature integrated analog front-end circuitry for each input channel with overvoltage protection up to ±20 V, a 4- or 8-channel multiplexer with automatic and manual scanning modes, and an on-chip, 4.096-V reference with low temperature drift. Operating on a single 5-V analog supply, each input channel on the devices can support true bipolar input ranges of ±10.24 V, ±5.12 V, and ±2.56 V, as well as unipolar input ranges of 0 V to 10.24 V and 0 V to 5.12 V. The gain of the analog front-end for all input ranges is accurately trimmed to ensure a high dc precision. The input range selection is software-programmable and independent for each channel. The devices offer a 1-MΩ constant resistive input impedance irrespective of the selected input range.
The ADS8684 and ADS8688 offer a simple SPI-compatible serial interface to the digital host and also support daisy-chaining of multiple devices. The digital supply operates from 1.65 V to 5.25 V, enabling direct interface to a wide range of host controllers.
ADS8688主要特性:
16-Bit ADC with Integrated Analog Front-End
4-, 8-Channel MUX with Auto and Manual Scan
Channel-Independent Programmable Input Ranges:
Bipolar: ±10.24 V, ±5.12 V, and ±2.56 V
Unipolar: 0 V to 10.24 V and 0 V to 5.12 V
5-V Analog Supply: 1.65-V to 5-V I/O Supply
Constant Resistive Input Impedance: 1 MΩ
Input Overvoltage Protection: Up to ±20 V
On-Chip, 4.096-V Reference with Low Drift
Excellent Performance:
500-kSPS Aggregate Throughput
DNL: ±0.5 LSB; INL: ±0.75 LSB
Low Drift for Gain Error and Offset
SNR: 92 dB; THD: –102 dB
Low Power: 65 mW
AUX Input → Direct Connection to ADC Inputs
SPI™-Compatible Interface with Daisy-Chain
–40℃ to 125℃ Industrial Temperature Range
TSSOP-38 Package (9.7 mm × 4.4 mm)
![](http://solution.eccn.com/uploads/solution/201411/20141107111912905.gif)
圖1. ADS8688功能框圖
![](http://solution.eccn.com/uploads/solution/201411/20141107111912742.gif)
圖2. 用于電源自動(dòng)化的ADS8688八路復(fù)用數(shù)據(jù)采集系統(tǒng)框圖
![](http://solution.eccn.com/uploads/solution/201411/20141107111912824.gif)
圖3. 用于PLC的ADS8688 16位八路綜合模擬輸出模塊框圖
ADS8688EVM-PDK 評(píng)估模塊
The ADS8688EVM-PDK is a platform for evaluating the ADS8688 device. The ADS8688EVM-PDK consists of an ADS8688EVM board and an SDCC controller card. The SDCC is an FPGA-based controller card that functions as an serial peripheral interface (SPI™) host and transfers data to the ADS8688EVM graphical user interface (GUI) via a USB interface. The ADS8688EVM GUI collects, analyzes, and records data from the ADS8688EVM board. The ADS8688EVM GUI is capable of collecting data from the ADS8688EVM in auto and manual modes, configuring the ADC program registers, and performing FFT analysis of data captured from the ADC.
ADS8688EVM-PDK 評(píng)估模塊主要特性:
• Includes support circuitry as a design example to match ADC performance.
• 3.3-V slave SPI.
• Serial interface header for easy connection to the SDCC controller card.
• Designed for a 5-V analog supply.
• Integrated 4.096-V voltage reference.
• Bipolar (±10.24 V, ±5,12 V, ±2.56 V )or unipolar(0 V to 10.24 V, 0 V to 5.12 V) input ranges for each channel.
• Onboard, second-order, Butterworth, low-pass filters for four channels.
• Onboard regulator for generating a ±15-V bipolar supply for second-order, Butterworth, low-pass filters.
• Capable of accepting a ±100-mV signal on the negative analog inputs (AIN_xGND).
ADS8688EVM-PDK 評(píng)估模塊GUI特性:
• Captures data from the ADS8688EVM in auto and manual modes.
• Configures the ADS8688 device program registers.
• Enables and disables channels in auto mode.
• FFT analysis and calculates the SNR, THD, and SINAD ac performance parameters.
• Single and multiple graph views for captured data.
• Includes a dc histogram for dc inputs.
• Logs ADC data.
![](http://solution.eccn.com/uploads/solution/201411/20141107111912280.gif)
圖4.ADS8688EVM-PDK 評(píng)估模塊外形圖: microSD存儲(chǔ)卡和SDCC控制板
The ADS8688EVM-PDK includes microSD memory cards that contain the EVM software and SDCC controller board firmware required for the EVM operation
![](http://solution.eccn.com/uploads/solution/201411/20141107111912750.gif)
圖5.ADS8688EVM-PDK 評(píng)估模塊電路圖(1)
![](http://solution.eccn.com/uploads/solution/201411/20141107111912866.gif)
圖6.ADS8688EVM-PDK 評(píng)估模塊電路圖(2)
ADS8688EVM材料清單:
![](http://solution.eccn.com/uploads/solution/201411/20141107111912196.gif)
![](http://solution.eccn.com/uploads/solution/201411/20141107111912279.gif)
![](http://solution.eccn.com/uploads/solution/201411/20141107111912889.gif)
![](http://solution.eccn.com/uploads/solution/201411/20141107111912138.gif)
圖7.ADS8688EVM-PDK 評(píng)估模塊PCB設(shè)計(jì)圖:頂層(L1)
![](http://solution.eccn.com/uploads/solution/201411/20141107111913533.gif)
圖8.ADS8688EVM-PDK 評(píng)估模塊PCB設(shè)計(jì)圖:地層(L2)
![](http://solution.eccn.com/uploads/solution/201411/20141107111913658.gif)
圖9.ADS8688EVM-PDK 評(píng)估模塊PCB設(shè)計(jì)圖:模擬電源層(L3)
![](http://solution.eccn.com/uploads/solution/201411/20141107111913543.gif)
圖10.ADS8688EVM-PDK 評(píng)估模塊PCB設(shè)計(jì)圖:數(shù)字電源層(L4)
![](http://solution.eccn.com/uploads/solution/201411/20141107111913399.gif)
圖11.ADS8688EVM-PDK 評(píng)估模塊PCB設(shè)計(jì)圖:地層(L5)
![](http://solution.eccn.com/uploads/solution/201411/20141107111913806.gif)
圖12.ADS8688EVM-PDK 評(píng)估模塊PCB設(shè)計(jì)圖:底層(L6) |
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