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| LTC2373－18 18位8路SAR ADC解決方案 |
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| 文章來源： 更新時(shí)間：2015/2/6 10:09:00 |
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Linear公司的LTC2373-18是18位取樣頻率1Msps的8路SAR低噪音高速模數(shù)轉(zhuǎn)換器(ADC),SNR為100dB,工作電壓單源5V,具有高度可配置低串?dāng)_8路輸入復(fù)接器,支持全差分,假差分單極和假差分雙極信號(hào)輸入,典型功耗40mW,主要用在可編邏輯控制器(PLC),工業(yè)過程控制,高速數(shù)據(jù)采集,手持儀表和自動(dòng)測(cè)試設(shè)備(ATE).本文介紹了LTC2373-18主要特性,框圖,幾種應(yīng)用電路,以及演示板DC2071A主要特性,電路圖,材料清單和PCB元件布局圖.
The LTCR2373-18 is a low noise, high speed, 8-channel18-bit successive approximation register (SAR) ADC. Operatingfrom a single 5V supply, the LTC2373-18 has a highlyconfigurable, low crosstalk 8-channel input multiplexer,supporting fully differential, pseudo-differential unipolar and pseudo-differential bipolar analog input ranges. TheLTC2373-18 achieves ±2.75LSB INL (maximum) in allinput ranges, no missing codes at 18-bits and 100dB (fullydifferential)/ 95dB (pseudo-differential) SNR (typical).
The LTC2373-18 has an onboard low drift (20ppm/°C max)2.048V temperature-compensated reference and a singleshotcapable reference buffer. The LTC2373-18 also has ahigh speed SPI-compatible serial interface that supports1.8V, 2.5V, 3.3V and 5V logic through which a sequencerwith a depth of 16 may be programmed. An internal oscillatorsets the conversion time, easing external timingconsiderations. The LTC2373-18 dissipates only 40mWand automatically naps between conversions, leading toreduced power dissipation that scales with the samplingrate. A sleep mode is also provided to reduce the powerconsumption of the LTC2373-18 to 300μW for furtherpower savings during inactive periods.
LTC2373-18主要特性:
1Msps Throughput Rate
18-Bit Resolution with No Missing Codes
8-Channel Multiplexer with Selectable Input Range
Fully Differential (±4.096V)
Pseudo-Differential Unipolar (0V to 4.096V)
Pseudo-Differential Bipolar (±2.048V)
INL: ±2.75LSB (Maximum)
SNR: 100dB (Fully Differential)/95dB (Pseudo-Differential) (Typical) at fIN = 1kHz
THD: –110dB (Typical) at fIN = 1kHz
Programmable Sequencer
Selectable Digital Gain Compression
Single 5V Supply with 1.8V to 5V I/O Voltages
SPI-Compatible Serial I/O
Onboard 2.048V Reference and Reference Buffer
No Pipeline Delay, No Cycle Latency
Power Dissipation 40mW (Typical)
Guaranteed Operation to 125°C
32-Lead 5mm × 5mm QFN Package
LTC2373-18應(yīng)用:
Programmable Logic Controllers
Industrial Process Control
High Speed Data Acquisition
Portable or Compact Instrumentation
ATE
圖1.LTC2373-18框圖
圖2.LTC2373-18典型應(yīng)用電路圖
圖3.LTC2373-18輸入信件鏈
圖4.LTC2373-18和LTC6362應(yīng)用框圖
演示板DC2071A
Demonstration circuit 2071A features the LTC®2373 family.The LTC2374/LTC2373/LTC2372 are low noise, highspeed, 8-channel, 16/18-bit successive approximationregister (SAR) ADCs. The following text refers to theLTC2373-18 but applies to all parts in the family, the onlydifferences being the number of bits and the maximumsample rate. Operating from a single 5V supply, the LTC2373-18 has a highly configurable, low crosstalk,8-channel input multiplexer, supporting fully differential,pseudo-differential unipolar and pseudo-differential bipolaranalog input ranges.
The DC2071 demonstrates the DC and AC performance ofthe LTC2373-18 in conjunction with the DC590 and DC890data collection boards. Use the DC590 to demonstrate DCperformance such as peak-to-peak noise and DC linearity.
Use the DC890 if precise sampling rates are required or todemonstrate AC performance such as SNR, THD, SINADand SFDR. The demonstration circuit 2071 is intended todemonstrate recommended grounding, component placementand selection, routing and bypassing for this ADC.
Several suggested driver circuits for the analog inputswill be presented.
圖5.演示板DC2071A外形圖
圖6.演示板DC2071A電路圖(1)
圖7.演示板DC2071A電路圖(2)
圖8.演示板DC2071A電路圖(3)
圖9.演示板DC2071A電路圖(4)
演示板DC2071A材料清單:
圖10.演示板DC2071A PCB元件布局圖:頂層
圖11.演示板DC2071A PCB元件布局圖:底層 |
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