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| SAM V71 32位ARM Cortex－M7 MCU開發(fā)方案 |
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| 文章來源： 更新時間：2015/4/13 10:23:00 |
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Atmel公司的SMART SAM V71是32位基于ARM Cortex-M7處理器和浮點單元(FPU)的高性能MCU,工作頻率高達300MHz,高達2048KB閃存和384KB多端口SRAM,外設包括支持IEEE1588, 802.1Qbb, 802.3az, 802.1AS和 802.1Qav的以太網(wǎng)MAC,高速USB器件和主接口,MediaLB器件接口,圖像傳感器接口,用于SDIO/SD/MMC的高速MCI接口,外接總線接口以及靜態(tài)存儲器控制器等.主要用在汽車娛樂系統(tǒng)連接和音頻處理等.本文介紹了SMART SAM V71主要特性和框圖,SAM V71 Xplained Ultra評估板主要特性和電路圖,材料清單和pcb元件布局圖.
The Atmel® | SMART SAM V71 devices are members of a family of AutomotiveFlash microcontrollers based on the high-performance 32-bit ARM® Cortex®-M7processor with Floating Point Unit (FPU). These devices operate at up to300 MHz and feature up to 2048 Kbytes of Flash and up to 384 Kbytes of multiportSRAM. The on-chip SRAM can be configured as Tightly Coupled Memory(TCM) or system memory. A multi-port access to the SRAM guarantees aminimum access latency. The peripheral set includes an Ethernet MAC supporting IEEE1588, 802.1Qbb, 802.3az, 802.1AS and 802.1Qav, a high-speedUSB Device port and a high-speed USB Host port sharing an embeddedtransceiver, a MediaLB device interface, an Image Sensor Interface, a high-speedMCI for SDIO/SD/MMC, an External Bus Interface featuring an SDRAMController, and a Static Memory Controller providing connection to SRAM,PSRAM, NOR Flash, LCD module and NAND Flash. Additional peripheralsinclude three USARTs, five UARTs, three TWIs, one Quad I/O SPI, two SPIs, oneSSC, as well as two enhanced PWMs, twelve general-purpose 16-bit timers withstepper motor and quadrature decoder logic support, two CAN-FDs, one lowpowerRTT, one low-power RTC, two 12-bit ADCs, one 12-bit DAC and oneanalog comparator.
The SAM V71 devices have three software-selectable low-power modes: Sleep,Wait and Backup. In Sleep mode, the processor is stopped while all otherfunctions can be kept running. In Wait mode, all clocks and functions are stoppedbut some peripherals can be configured to wake up the system based onpredefined conditions. This feature, called SleepWalking™, performs a partialasynchronous wake-up, thus allowing the processor to wake up only when needed. In Backup mode, RTT, RTC and wake-up logic are running. In addition,in this mode, the device is able to meet the most stringent Key-Off requirementswhile retaining 1Kbyte of SRAM and wake-up on CAN.
To optimize power consumption, the clock system has been designed to supportdifferent clock frequencies for selected peripherals. Moreover, the processor andbus clock frequency can be modified without affecting processing on, for example,the USB, U(S)ART, ADC and Timer Counter.
The Event System allows peripherals to receive, react to and send events inActive and Sleep modes without processor intervention.
The SAM V71 devices are high-performance Automotive microcontrollers,targeting In-Vehicle Infotainment connectivity applications, combining a rich set ofinterfaces including Ethernet-AVB and advanced DSP capabilities particularlyuseful for audio processing.
SMART SAM V71主要特性:
l Core
̶ ARM Cortex-M7 running at up to 300 MHz
̶ 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
̶ Simple- and double-precision HW Floating Point Unit (FPU)
̶ Memory Protection Unit (MPU) with 16 zones
̶ DSP Instructions, Thumb®-2 Instruction Set
̶ Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
l Memories
̶ Up to 2048 Kbytes embedded Flash with unique identifier
̶ Embedded Flash Controller
̶ Up to 384 Kbytes embedded Multi-port SRAM
̶ Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x128 Kbytes)
̶ 16 Kbytes ROM with embedded Boot Loader routines (UART0, USB) and IAP routines
̶ 16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, NOR and NAND Flash
̶ 16-bit SDRAM Controller
l System
̶ Embedded voltage regulator for single-supply operation
̶ Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
̶ Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHzneeded for USB operations. Optional low-power 32.768 kHz for RTC or device clock
̶ RTC with Gregorian and Persian calendar mode, waveform generation in low-power modes
̶ RTC clock calibration circuitry for 32.768 kHz crystal frequency compensation
̶ High-precision 4/8/12 MHz factory-trimmed internal RC oscillator with 4 MHz default frequency for devicestartup. In-application trimming access for frequency adjustment
̶ Slow Clock Internal RC oscillator as permanent low-power mode device clock
̶ One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
̶ Temperature Sensor
̶ One dual-port 24-channel Central DMA Controller
l Low-Power Modes
̶ Sleep, Wait and Backup modes, with power consumption down to 3 μA in Backup mode
̶ Ultra-low-power RTC and RTT
̶ 1 Kbyte of backup RAM with dedicated regulator
l Peripherals
̶ One Ethernet MAC (GMAC) 10/100 Mbps in MII mode and RMII with dedicated DMA. IEEE1588 PTP framesand 802.3az Energy-efficiency support. Ethernet AVB support with IEEE802.1AS Time-stamping andIEEE802.1Qav credit-based traffic-shaping hardware support.
̶ USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-kbyte FIFO, up to 10 bidirectional endpoints,dedicated DMA
̶ 12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
̶ Two Master CAN-FD Controllers with SRAM-based mailboxes, time- and event-triggered transmission
̶ MediaLB® device with 3-wire mode, up to 1024 x Fs speed, supporting MOST25 and MOST50 networks
̶ Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA®, RS-485, SPI, Manchester and Modemmodes; USART1 supports LON mode.
̶ Five 2-wire UARTs with SleepWalking support
̶ Three Two-Wire Interfaces (TWIHS) (I2C-compatible) with SleepWalking support
̶ Quad I/O Serial Peripheral Interface (QSPI) with eXecute-In-Place feature to a dedicated AHB memory zone
̶ Two Serial Peripheral Interfaces (SPI)
̶ One Serial Synchronous Controller (SSC) with I2S and TDM support
̶ One High-speed Multimedia Card Interface (SDIO/SD Card/MMC)
̶ Four Three-Channel 16-bit Timer/Counters with Capture, Waveform, Compare and PWM modes, constant ontime. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
̶ Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs per PWMfor motor control, two external triggers to manage power factor correction (PFC), DC-DC and lighting control.
̶ 32-bit low-power Real-time Timer (RTT)
̶ Real-time Counter (RTC) with calendar and alarm features
̶ Two ADCs, each supporting up to 12 channels with differential input mode and programmable gain stage,allowing dual sampling and hold at up to 2 Msps. Gain and Offset error Autotest feature.
̶ One 2-channel 12-bit 2 Msps DAC
̶ One Analog Comparator with flexible input selection, selectable input hysteresis
l Cryptography
̶ True Random Number Generator (TRNG)
̶ AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications
̶ Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256.
l I/O
̶ Up to 115 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering andOn-die Series Resistor Termination
̶ Five Parallel Input/Output Controllers
l Voltage
̶ Single supply voltage from 1.62V to 3.6V
l Automotive
̶ Qualification AEC-Q100 grade 2 ([-40℃ : +105℃] ambient temperature)
l Packages
̶ LQFP144, 144-lead LQFP, 20 x 20 mm, pitch 0.5 mm
̶ LFBGA144, 144-ball LFBGA, 10 x 10 mm, pitch 0.8 mm
̶ LQFP100, 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm
̶ TFBGA100, 100-ball TFBGA, 9 x 9 mm, pitch 0.8 mm
̶ LQFP64, 64-lead LQFP, 10 x 10 mm, pitch 0.5 mm
̶ TFBGA64, 64-ball TFBGA, TBD
̶ QFN64, 64-pad QFN 9x9 mm, pitch 0.5 mm, with wettable flanks
圖1.SMART SAM V71 144引腳框圖
The Atmel®| SMART SAM V71 Xplained Ultra evaluation kit is a hardwareplatform to evaluate the ATSAMV71Q21, and other Atmel ARM® Cortex®-M7-based microcontrollers in the SAM V70, SAM S70, and SAM E70 series.
Supported by the Atmel Studio integrated development platform, the kitprovides easy access to the features of the Atmel ATSAMV71Q21 andexplains how to integrate the device in a custom design.
The Xplained Ultra series evaluation kits include an on-board EmbeddedDebugger, and no external tools are necessary to program or debug theATSAMV71Q21.
The Xplained Pro extension kits offers additional peripherals to extend thefeatures of the board and ease the development of custom designs.
SAM V71 Xplained Ultra評估板主要特性:
• ATSAMV71Q21 microcontroller
• One mechanical reset button
• One power switch button
• Two mechanical user pushbuttons
• Two yellow user LEDs
• Supercap backup
• 12.0MHz crystal
• 32.768kHz crystal
• 2MB SDRAM
• 2MB QSPI Flash
• Built in Ethernet MAC with external IEEE 802.3az 10Base-T/100Base-TX Ethernet RMII PHY
• AT24MAC402 256KByte EEPROM with EUI-48™ address
• WM8904 low power stereo audio codec
– External PLL for precise clock generation
– Microphone jack
– Headphone jack
• ATA6561 CAN Transceiver
• SD Card connector with SDIO support
• Camera interface connector
• MediaLB connector
• Two Xplained Pro extension headers
• One Xplained Pro LCD header
• Coresight 20 connector for 4-bit ETM
• Arduino™ Due based shield connectors
• External debugger connector
• USB interface, device and host mode
• Embedded Debugger
– Auto-ID for board identification in Atmel Studio
– One yellow status LED
– One green board power LED
– Symbolic debug of complex data types including scope information
– Programming and debugging
– Data Gateway Interface: SPI, I2C, four GPIOs
– Virtual COM port (CDC)
• External power input (5-14V)
• USB powered
圖2.SAM V71 Xplained Ultra評估板外形圖
圖3.SAM V71 Xplained Ultra評估板電路圖(1)
圖4.SAM V71 Xplained Ultra評估板電路圖(2)
圖5.SAM V71 Xplained Ultra評估板電路圖(3)
圖6.SAM V71 Xplained Ultra評估板電路圖(4)
圖7.SAM V71 Xplained Ultra評估板電路圖(5)
圖8.SAM V71 Xplained Ultra評估板電路圖(6)
圖9.SAM V71 Xplained Ultra評估板電路圖(7)
圖10.SAM V71 Xplained Ultra評估板電路圖(8)
圖11.SAM V71 Xplained Ultra評估板電路圖(9)
圖12.SAM V71 Xplained Ultra評估板電路圖(10)
圖13.SAM V71 Xplained Ultra評估板電路圖(11)
圖14.SAM V71 Xplained Ultra評估板電路圖(12)
圖15.SAM V71 Xplained Ultra評估板電路圖(13)
SAM V71 Xplained Ultra評估板材料清單:
圖16.SAM V71 Xplained Ultra評估板PCB元件布局圖(頂層)
圖17.SAM V71 Xplained Ultra評估板PCB元件布局圖(底層) |
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