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LPC1549馬達(dá)控制方案
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NXP公司的LPC15xx系列是基于ARM Cortex-M3核的微控制器(MCU),具有豐富外設(shè)和非常低的功耗,CPU頻率高達(dá)72MHz,采用3級(jí)流水線和哈佛架構(gòu),多達(dá)256KB片上編程的閃存,36KB SRAM和4KB EEPROM,主要用在馬達(dá)控制,太陽能逆變器,馬達(dá)驅(qū)動(dòng)器,家用電器,建筑物和工廠自動(dòng)化,工業(yè)和藹醫(yī)療以及數(shù)字電源.本文介紹了LPC15xx系列主要特性和優(yōu)勢,框圖,以及LPC1549馬達(dá)控制板主要特性,框圖和電路圖.
The LPC15xx are ARM Cortex-M3 based microcontrollers for embedded applications featuring a rich peripheral set with very low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.
The LPC15xx operate at CPU frequencies of up to 72 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching.
The LPC15xx includes up to 256 kB of flash memory, 32 kB of ROM, a 4 kB EEPROM, and up to 36 kB of SRAM. The peripheral complement includes one full-speed USB 2.0 device, two SPI interfaces, three USARTs, one Fast-mode Plus I2C-bus interface, one C_CAN module, PWM/timer subsystem with four configurable, multi-purpose State Configurable Timers (SCTimer/PWM) with input pre-processing unit, a Real-time clock module with independent power supply and a dedicated oscillator, two 12-channel/12-bit,2 Msamples/s ADCs, one 12-bit, 500 kSamples/s DAC, four voltage comparators with internal voltage reference, and a temperature sensor. A DMA engine can service most peripherals.

LPC15xx系列主要特性和優(yōu)勢:
 System:
 ARM Cortex-M3 processor (version r2p1), running at frequencies of up to 72 MHz.
 ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
 System tick timer.
 Serial Wire Debug (SWD) with four breakpoints and two watchpoints.
 Single-cycle multiplier supported.
 Memory Protection Unit (MPU) included.
 Memory:
 Up to 256 kB on-chip flash programming memory with 256 Byte page write anderase.
 Up to 36 kB SRAM.
 4 kB EEPROM.
 ROM API support:
 Boot loader with boot options from flash or external source via USART, C_CAN, orUSB
 USB drivers
 ADC drivers
 SPI drivers
 USART drivers
 I2C drivers
 Power profiles and power mode configuration with low-power mode configuration option
 DMA drivers
 C_CAN drivers
 Flash In-Application Programming (IAP) and In-System Programming (ISP).
 Digital peripherals:
 Simple DMA engine with 18 channels and 20 programmable input triggers.
 High-speed GPIO interface with up to 76 General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors, open-drain mode, input inverter, and programmable digital glitch filter.
 GPIO interrupt generation capability with boolean pattern-matching feature on eight external inputs.
 Two GPIO grouped port interrupts.
 Switch matrix for flexible configuration of each I/O pin function.
 CRC engine.
 Quadrature Encoder Interface (QEI).
 Configurable PWM/timer/motor control subsystem:
 Up to four 32-bit counter/timers or up to eight 16-bit counter/timers or combinations of 16-bit and 32-bit timers.
 Up to 28 match outputs and 22 configurable capture inputs with input multiplexer.
 Up to 28 PWM outputs total.
 Dither engine for improved average resolution of pulse edges.
 Four State Configurable Timers (SCTimers) for highly flexible, event-driven timing and PWM applications.
 SCT Input Pre-processor Unit (SCTIPU) for processing timer inputs and immediate handling of abort situations.
 Integrated with ADC threshold compare interrupts, temperature sensor, and analog comparator outputs for motor control feedback using analog signals.
 Special-application and simple timers:
 24-bit, four-channel, multi-rate timer (MRT) for repetitive interrupt generation at up to four programmable, fixed rates.
 Repetitive interrupt timer for general purpose use.
 Windowed Watchdog timer (WWDT).
 High-resolution 32-bit Real-time clock (RTC) with selectable 1 s or 1 ms time resolution running in the always-on power domain. RTC can be used for wake-up from all low power modes including Deep power-down.
 Analog peripherals:
 Two 12-bit ADC with up to 12 input channels per ADC and with multiple internal and external trigger inputs and sample rates of up to 2 Msamples/s. Each ADC supports two independent conversion sequences. ADC conversion clock can be the system clock or an asynchronous clock derived from one of the three PLLs.
 One 12-bit DAC.
 Integrated temperature sensor and band gap internal reference voltage.
 Four comparators with external and internal voltage references (ACMP0 to 3). Comparator outputs are internally connected to the SCTimer/PWMs and ADCs and externally to pins. Each comparator output contains a programmable glitch filter.
 Serial interfaces:
 Three USART interfaces with DMA, RS-485 support, autobaud, and with synchronous mode and 32 kHz mode for wake-up from Deep-sleep and Power-down modes. The USARTs share a fractional baud-rate generator.
 Two SPI controllers.
 One I2C-bus interface supporting fast mode and Fast-mode Plus with data rates of up to 1Mbit/s and with multiple address recognition and monitor mode.
 One C_CAN controller.
 One USB 2.0 full-speed device controller with on-chip PHY.
 Clock generation:
 12 MHz internal RC oscillator trimmed to 1 % accuracy for 25 C Tamb+85 C that can  ptionally be used as a system clock.
 Crystal oscillator with an operating range of 1 MHz to 25 MHz.
 Watchdog oscillator with a frequency range of 503 kHz.
 32 kHz low-power RTC oscillator with 32 kHz, 1 kHz, and 1 Hz outputs.
 System PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.
 Two additional PLLs for generating the USB and SCTimer/PWM clocks.
 Clock output function with divider that can reflect the crystal oscillator, the main clock,the IRC, or the watchdog oscillator.
 Power control:
 Integrated PMU (Power Management Unit) to minimize power consumption.
 Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, and Deep power-down mode.
 APIs provided for optimizing power consumption in active and sleep modes and for configuring Deep-sleep, Power-down, and Deep power-down modes.
 Wake-up from Deep-sleep and Power-down modes on activity on USB, USART,SPI, and I2C peripherals.
 Wake-up from Sleep, Deep-sleep, Power-down, and Deep power-down modes from the RTC alarm or wake-up interrupts.
 Timer-controlled self wake-up from Deep power-down mode using the RTC
high-resolution/wake-up 1 kHz timer.
 Power-On Reset (POR).
 BrownOut Detect BOD).
 JTAG boundary scan modes supported.
 Unique device serial number for identification.
 Single power supply 2.4 V to 3.6 V.
 Temperature range 40 °C to +105 °C.
 Available as LQFP100, LQFP64, and LQFP48 packages.

LPC15xx系列應(yīng)用:
Motor control 
Solar inverters
Motion drives 
Home appliances
Digital power supplies 
Building and factory automation
Industrial and medical

圖1.LPC15xx系列框圖

LPC1549馬達(dá)控制板
LPC1549 Motor Control Kit (Permanent Magnet/Teknic Motor) makes it possible for you to get started with motor control prototyping immediately. It is a platform for low voltage motor control based on NXP’s MCUs. With this universal platform it is possible to control motors.

圖2.LPC1549馬達(dá)控制板(永磁/Teknic馬達(dá))外形圖

LPC1549馬達(dá)控制板主要特性:
The LPC1549 ARM Cortex-M3 based microcontroller
256 kB of flash memory, 32 kB of ROM, 4 kB EEPROM, and up to 36 kB of SRAM
Expansion connector for control by LPC1800/LPC4000/LPC2900 families, or other 4 phases (based on NXP PSMN2R6-40YS N-channel MOSFET), accessed via screw terminals
Phase control support 100% duty cycle
Voltage measurement (on three phases and virtual ground)
Current measurement (in-phase on three phases and common low-side)
Input current measurement, including over-current trip
Break functionality
Hall & QEI sensor inputs, connected via screw terminals
Temperature sensor
12-30 V input voltage, 17 A max current (max 300 W output)
On-board 15 W power supply (+11 V, +5 V, +3.3 V)
USB interface (must be supported by controlled MCU)
Ethernet interface (must be supported by controlled MCU)
CAN interface (must be supported by controlled MCU)
RS422/485 interface
UART-to-USB interface
5-key joystick switch
96 x 64 pixel OLED
Reset pushbutton
I²C-EEPROM
SWD/JTAG connector
2.1 mm input jack, or via screw terminals
12-30 V, 17 A max

LPC1549馬達(dá)控制板包括:
LPCXpresso Motor Control Board, rev. B
LPCXpresso LPC1549 Board 
Permanent Magnet/Teknic Motor
24 V Power supply 
mini-B to A USB cable
micro-B to A USB cable

圖3.LPC1549馬達(dá)控制板框圖

圖4.LPC1549馬達(dá)控制板電路圖(1)

圖5.LPC1549馬達(dá)控制板電路圖(2)

圖6.LPC1549馬達(dá)控制板電路圖(3)

圖7.LPC1549馬達(dá)控制板電路圖(4)

圖8.LPC1549馬達(dá)控制板電路圖(5)

圖9.LPC1549馬達(dá)控制板電路圖(6)

圖10.LPC1549馬達(dá)控制板電路圖(7)

圖11.LPC1549馬達(dá)控制板電路圖(8)

圖12.LPC1549馬達(dá)控制板電路圖(9)

圖13.LPC1549馬達(dá)控制板電路圖(10)
 
 
 
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